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pastel-00563947v1  Theses
Etienne Borde. Configuration et Reconfiguration des Systèmes Temps-Reél Répartis Embarqués Critiques et Adaptatifs
Systèmes embarqués. Télécom ParisTech, 2009. Français
cea-01846864v1  Journal articles
V. Legout, M. Jan, Laurent Pautet. Scheduling algorithms to reduce the static energy consumption of real-time systems
Experiments in Fluids, Springer Verlag (Germany), 2015, 56 (3), pp.153-191. ⟨10.1007/s11241-014-9207-7⟩
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hal-03276250v1  Journal articles
Laurent Pautet, Thomas Robert, Samuel Tardieu. Litmus-RT plugins for global static scheduling of mixed criticality systems
Journal of Systems Architecture, Elsevier, 2021, 118, pp.102221. ⟨10.1016/j.sysarc.2021.102221⟩
hal-02287276v1  Conference papers
Naji Amine, Florian Brandner. A Comparative Study of the Precision of Stack Cache Occupancy Analyses
9th Junior Researcher Workshop on Real-Time Computing, Nov 2015, Lille, France. pp.13-16
hal-01246343v1  Conference papers
Amine Naji, Florian Brandner. A Comparative Study of the Precision of Stack Cache Occupancy Analyses
9th Junior Researcher Workshop on Real-Time Computing, Julien Forget, Nov 2015, Lille, France. pp.4
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hal-02447339v1  Conference papers
Farouk Hebbache, Florian Brandner, Mathieu Jan, Laurent Pautet. Arbitration-Induced Preemption Delays
31st Euromicro Conference on Real-Time Systems, Jul 2019, Stuttgart, Germany. ⟨10.4230/LIPIcs.ECRTS.2019.19⟩
hal-02288493v1  Conference papers
Florian Brandner, Naji Amine. Worst-Case Execution Time Analysis of Predicated Architectures
Workshop on Worst-Case Execution Time Analysis, Jun 2017, Dubrovnik, Croatia. pp.1-13, ⟨10.4230/OASIcs.WCET.2017.6⟩
hal-02287739v1  Conference papers
Farouk Hebbache, Mathieu Jan, Florian Brandner, Laurent Pautet. Dynamic Arbitration of Memory Requests with TDM-like Guarantees
Workshop on Compositional Theory and Technology for Real-Time Embedded Systems, Dec 2017, Paris, France
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hal-02270295v1  Conference papers
I Perseil, Laurent Pautet. COntinuuM, a CO-modelling Methodology for the Integration of Real-time Architecture Models
Embedded Real Time Software and Systems (ERTS2008), Jan 2008, Toulouse, France
hal-02287376v1  Conference papers
Naji Amine, Florian Brandner. Eager Stack Cache Memory Transfers
Workshop on Worst-Case Execution Time Analysis, Jul 2016, Toulouse, France
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hal-01419973v1  Reports
Loïc Besnard, Thierry Gautier, Paul Le Guernic, Clément Guy, Jean-Pierre Talpin et al.  Formal semantics of behavior specifications in the architecture analysis and design language standard
[Research Report] RR-8950, INRIA. 2016, pp.30 - 39
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tel-02086680v1  Theses
Roberto Medina. Deployment of mixed criticality and data driven systems on multi-cores architectures
Embedded Systems. Université Paris-Saclay, 2019. English. ⟨NNT : 2019SACLT004⟩
hal-01246348v1  Conference papers
Sahar Abbaspour, Florian Brandner, Amine Naji, Mathieu Jan. Efficient Context Switching for the Stack Cache
Proceedings of the 23rd International Conference on Real Time and Networks Systems, Julien Forget (Université de Lille, France), Nov 2015, Lille, France. pp.10, ⟨10.1145/2834848.2834861⟩
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tel-02494421v1  Theses
Farouk Hebbache. Work-conserving dynamic TDM-based memory arbitration for multi-criticality real-time systems
Hardware Architecture [cs.AR]. Université Paris Saclay (COmUE), 2019. English. ⟨NNT : 2019SACLT044⟩