FPGA implementation of a real time multi-resolution edge detection video filter
Résumé
This paper presents digital video filters labs for final year engineering students. The project deals with the implementation of Canny Deriche optimal edge detectors on a FPGA plateform. The target of these labs is to illustrate the design of integrated electronic systems and to introduce the concept of architecture/algorithm adequacy.
Origine : Fichiers produits par l'(les) auteur(s)
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