16PE 3D-MESH NOC Based 3D Multicore Design and Implementation

Mohamad Jabbar (1) , Dominique Houzet (1) , Omar Hammami (2)

1 GIPSA-AGPIG - GIPSA - Architecture, Géométrie, Perception, Images, Gestes
2 UEI - Unité d'Électronique et d'informatique

In this paper, we describe the design flow, architecture and implementation of our 3D multiprocessor with NoC . The design based on 16 processors communicating using a 4x2x2 mesh NoC spread on two tiers is discussed in detail and will be fabricated using Tezzaron technology with 130 nm Global Foundaries standard library. The purpose of this work is to accurately measure NoC performances in real 3D chip when running mobile multimedia applications to evaluate the impact of 3D architecture compared to 2D.

Mots clés: 3D; multicore; mesh; noc; tezzaron

Domaines: Electronique

Mohamad Jabbar, Dominique Houzet, Omar Hammami. 16PE 3D-MESH NOC Based 3D Multicore Design and Implementation. 17th Workshop on Synthesis And System Integration of Mixed Information Technologies, Mar 2012, Beppu, Japan. pp.488-489. ⟨hal-00665247⟩